Memory Read Request Header (64-bit Address)
The most common Non-Posted transaction. Uses 4 DW header for 64-bit addressing.
Byte
7
6
5
4
3
2
1
0
+0
Fmt[2]
Fmt[1]
Fmt[0]
Type4
Type3
Type2
Type1
Type0
+1
T9
TC2
TC1
TC0
T8
Attr2
LN
TH
+2
TD
EP
Attr1
Attr0
AT1
AT0
Len9
Len8
+3
Len7
Len6
Len5
Len4
Len3
Len2
Len1
Len0
+4 to +5
Requester ID [15:0]
+6 to +7
Tag [7:0]
+8 to +11
Address [63:32]
+12 to +14
Address [31:2]
+15
Last DW BE [3:0]
First DW BE [3:0]
Fmt/Type
Traffic Class
Attributes
Length
Requester ID
Tag
Address
Byte Enables
Field Definitions
| Field | Bits | Description | MRd Value |
|---|---|---|---|
| Fmt | 3 | Format: header size and data presence | 001 (4DW, no data) |
| Type | 5 | Transaction type | 00000 |
| T9, T8 | 2 | Tag extension bits [9:8] | For 10-bit tags |
| TC | 3 | Traffic Class (0-7) | Usually 0 |
| Attr[2] (IDO) | 1 | ID-Based Ordering | 0 or 1 |
| LN | 1 | Lightweight Notification | Reserved |
| TH | 1 | TLP Processing Hints present | 0 or 1 |
| TD | 1 | TLP Digest (ECRC) present | 0 or 1 |
| EP | 1 | Error/Poisoned | Must be 0 |
| Attr[1:0] | 2 | [1]=Relaxed Ordering, [0]=No Snoop | 00 default |
| AT | 2 | Address Type (for ATS) | 00=Untranslated |
| Length | 10 | Payload length in DW (1-1024, 0=1024) | Read size |
| Requester ID | 16 | Bus:Device:Function of requester | Source BDF |
| Tag | 8+ | Transaction identifier | Unique per outstanding |
| Address | 62 | Target address (bits [63:2]) | Memory address |
| First DW BE | 4 | Byte enables for first DW | Valid pattern |
| Last DW BE | 4 | Byte enables for last DW | Valid or 0000 |
Completion Header Format
Completions return data or status for Non-Posted requests. Always 3 DW header.
DW0: Fmt[2:0]=0x0 | Type[4:0]=01010 | T9 | TC[2:0] | T8 | Attr[2] | LN | TH | TD | EP | Attr[1:0] | AT[1:0] | Length[9:0]
DW1: Completer ID[15:0] | Cpl Status[2:0] | BCM | Byte Count[11:0]
DW2: Requester ID[15:0] | Tag[7:0] | R | Lower Address[6:0]
Completion Status Codes:
000 = SC (Successful Completion)
001 = UR (Unsupported Request)
010 = CRS (Configuration Request Retry Status)
100 = CA (Completer Abort)
BCM (Byte Count Modified): Set when Completer modified BC for PCI-X compatibility
Byte Count: Remaining bytes including this completion (for split completions)
Lower Address: Byte address within first DW of completion data
Completion Tracking
Byte Count field enables tracking split completions. Initial value equals total requested bytes. Each completion decrements by data returned. When Byte Count reaches 0, all data received.
Lower Address indicates starting byte offset within first DW (0-3). Used when read didn't start on DW boundary.
Flit Mode Header Differences
PCIe 6.0+ Flit Mode uses optimized header formats with different field positions.
Key Flit Mode Changes
- Type field expanded: 8 bits (vs 5 bits in Non-Flit)
- No Fmt field: Type encoding includes format information
- 14-bit Tags: Full tag in contiguous field
- OHC (Optimized Header Compression): Reduces header overhead
- No TH bit: TPH handled differently
- Byte Enables implied: Not explicitly in header for most cases
// Flit Mode Memory Request Header (64-bit)
DW0: Type[7:0] | TC[2:0] | OHC[4:0] | TS[1:0] | Attr[2:0] | Length[10:0]
DW1: Requester ID[15:0] | EP | R | Tag[13:0]
DW2: Address[63:32]
DW3: Address[31:2] | AT[1:0]
// Type encodings include:
0x00 = MRd (32-bit) 0x20 = MRd (64-bit)
0x01 = MWr (32-bit) 0x21 = MWr (64-bit)
0x02 = IORd 0x03 = IOWr
0x04 = CfgRd0 0x05 = CfgWr0
0x4A = Cpl 0x4B = CplD