Extended tag fields, Flit Mode requirements, capability bits, and segment capture
| Tag Size | Max Outstanding | PCIe Version | Mode |
|---|---|---|---|
| 5-bit | 32 | PCIe 1.0 | Non-Flit |
| 8-bit | 256 | PCIe 2.0+ | Non-Flit |
| 10-bit | 1024 | PCIe 4.0+ | Non-Flit |
| 14-bit | 16384 | PCIe 6.0+ | Flit Mode Only |
14-Bit Tag Field (Flit Mode Header)
┌──────────────────────────────────────────────────────┐
│ 13 │ 12 │ 11 │ 10 │ 9 │ 8 │ 7 │ 6 │ 5 │ 4 │ 3 │ 2 │ 1 │ 0 │
└──────────────────────────────────────────────────────┘
│◄─────── Tag[13:10] ───────►│◄── Tag[9:8] ──►│◄─────── Tag[7:0] ─────►│
(Extended) (10-bit ext) (Base Tag)
Tag Ranges:
- Tag[7:0]: Base tag (256 values) - Always present
- Tag[9:8]: 10-bit extension (additional 768 values)
- Tag[13:10]: 14-bit extension (additional 15360 values)
Total: 16384 unique tags per Requester
| TLP Type | Tag Bits | Header DW |
|---|---|---|
| Memory Read (MRd) | Tag[13:0] | DW1 |
| Memory Write (MWr) | N/A (Posted) | - |
| Completion (CplD) | Tag[13:0] | DW2 |
| UIO Read (UIOMRd) | Tag[13:0] | DW1 |
| UIO Write (UIOMWr) | Tag[13:0] | DW1 |
Before enabling 14-bit tags, system software must verify that all potential Completers (including Root Complex, switches, and endpoints) support 14-bit tags. Using 14-bit tags with a non-supporting Completer results in undefined behavior.
| Mode | Max Tag Size | Location |
|---|---|---|
| Non-Flit Mode | 10-bit | Tag[7:0] in header, Tag[9:8] in TLP Prefix |
| Flit Mode | 14-bit | Tag[13:0] in header (no prefix needed) |
| Range | Tags | Usage |
|---|---|---|
| 0-31 | 32 | 5-bit tag compatibility |
| 0-255 | 256 | 8-bit tag compatibility |
| 0-1023 | 1024 | 10-bit tag range |
| 1024-16383 | 15360 | 14-bit exclusive range |
Unordered I/O (UIO) mandates 14-bit tags:
When operating with extended tags (10-bit or 14-bit), intermediate switches/RCs may need to capture extended segments for error logging.