Function Level Reset (FLR) Complete Guide

1. What is FLR?

What is Function Level Reset?

FLR (Function Level Reset) resets a single PCIe function to its initial state without affecting other functions in the same device or the PCIe link. Essential for virtualization and error recovery.

Reset Types Comparison

Reset Type	Scope	Link Impact
Fundamental Reset	Entire device	Link down (LTSSM to Detect)
Hot Reset	Entire device	TS1 with Hot Reset bit
FLR	Single function	No link impact

2. Why FLR?

Use Cases

VM Migration: Reset VF before assigning to new VM
Error Recovery: Reset hung function without affecting others
Security: Ensure clean state between VM assignments
Driver Reload: Reset function on driver unload/reload

3. FLR Capability

Device Capabilities Register

    Device Capabilities Register (Offset 04h in PCIe Capability):
    ┌──────────────────────────────────────────────────────────────┐
    │ Bit 28: FLR Capable                                          │
    │   0 = Function does not support FLR                          │
    │   1 = Function supports FLR                                  │
    └──────────────────────────────────────────────────────────────┘

Initiating FLR

    Device Control Register (Offset 08h in PCIe Capability):
    ┌──────────────────────────────────────────────────────────────┐
    │ Bit 15: Initiate Function Level Reset                        │
    │   Write 1 to initiate FLR                                   │
    │   Self-clearing (reads as 0)                                 │
    └──────────────────────────────────────────────────────────────┘

4. FLR Effects

What Gets Reset

All function-specific state
Outstanding transactions (completions/requests)
Internal queues and buffers
MSI/MSI-X enable (interrupts disabled)
Bus Master Enable (BME cleared)
Memory/IO Space Enable cleared
AER status registers

What is Preserved

Sticky registers (marked as such in spec)
Link state and training parameters
Other functions in multi-function device
Captured slot power limit

5. FLR Timing

Reset Duration

Default: 100ms for function to complete reset
May be shorter (Readiness Time Reporting)
Software must wait before accessing function

FLR Flow

    1. Software quiesces function (stop I/O)
           │
    2. Disable Bus Master Enable
           │
    3. Wait for outstanding transactions (Completion Timeout)
           │
    4. Write 1 to Initiate FLR bit
           │
    5. Wait 100ms (or per Readiness Time Reporting)
           │
    6. Check for FRS message (if supported)
           │
    7. Reconfigure function

6. FLR and SR-IOV

VF FLR

Each VF has independent FLR capability
VF FLR does not affect PF or other VFs
Essential for VM live migration

PF FLR

PF FLR affects all associated VFs
VF Enable must be cleared first
All VFs become non-existent after PF FLR

7. Linux FLR

    # Check FLR capability
    lspci -vvv -s 03:00.0 | grep "FLReset"
    
    # Trigger FLR via sysfs
    echo 1 > /sys/bus/pci/devices/0000:03:00.0/reset
    
    # Using setpci
    # Read Device Control, set bit 15, write back

8. FLR Rules

Function must complete all outstanding transactions
Function must return CRS for 100ms after FLR
Software must not access function during FLR
FRS message indicates function ready (if supported)
Multi-function devices: only targeted function affected