POWER OPTIMIZATION

LTR & OBFF Complete Guide

Latency Tolerance Reporting and Optimized Buffer Flush/Fill for power efficiency

1. What is LTR?

What is Latency Tolerance Reporting?

LTR (Latency Tolerance Reporting) allows endpoints to report their latency requirements to the platform. This enables the platform to make informed power management decisions while meeting device latency needs.

LTR Concept

    Device                    Platform Power Manager
       │                              │
       │  LTR Message                 │
       │  "I can tolerate 100μs       │
       │   snoop latency"             │
       │ ─────────────────────────────►│
       │                              │
       │                    Platform decides:
       │                    - Can enter C6 state (90μs exit)
       │                    - Cannot enter C7 (150μs exit)
       │                              │
       │  Traffic resumes within      │
       │  100μs of wake               │
       │ ◄─────────────────────────────│

2. Why LTR?

Why report latency tolerance?

Deep power states (C6, C7, package C-states) save significant power but have long exit latencies. LTR lets the platform safely enter these states when devices can tolerate the latency.

Power vs Latency Trade-off

C-State Power Savings Exit Latency
C0 (Active) None 0 μs
C1 Low ~2 μs
C3 Medium ~50 μs
C6 High ~100 μs
C7 Very High ~150 μs
Package C6 Maximum ~200+ μs

3. LTR Message Format

LTR Message TLP

    LTR Message (routed to Root Complex):
    
    Header (3 DW):
    ┌─────────────────────────────────────────────────────────────────┐
    │ Fmt=00 │ Type=10000 │ Routing=000 │ ... │ Length=1             │
    │        │ (Msg)      │ (to RC)     │     │                      │
    └─────────────────────────────────────────────────────────────────┘
    
    Payload (1 DW):
    ┌─────────────────────────────────────────────────────────────────┐
    │  Rsvd  │ No-Snoop │ Snoop Lat    │ No-Snoop │ Snoop Lat Scale  │
    │ [31:26]│  Req [25]│  Value[24:16]│ Scale[15:13]│ Value[9:0]    │
    └─────────────────────────────────────────────────────────────────┘
    
    Scale Values:
    000 = 1 ns
    001 = 32 ns
    010 = 1024 ns (1.024 μs)
    011 = 32768 ns (~33 μs)
    100 = 1048576 ns (~1 ms)
    101 = 33554432 ns (~34 ms)

Latency Values

4. LTR Capability

Device Capabilities 2 Register

Bit Field Description
11 LTR Mechanism Supported Device supports LTR

Device Control 2 Register

Bit Field Description
10 LTR Mechanism Enable Enable LTR messaging

LTR Extended Capability (optional)

Offset Register Description
00h Extended Cap Header ID = 0018h
04h Max Snoop Latency Maximum tolerable snoop latency
06h Max No-Snoop Latency Maximum tolerable no-snoop latency

5. What is OBFF?

What is Optimized Buffer Flush/Fill?

OBFF (Optimized Buffer Flush/Fill) allows the platform to signal devices when the CPU is in a low-power state, enabling devices to optimize their memory access patterns.

OBFF Concept

    Platform                          Device
       │                                  │
       │ CPU entering deep sleep          │
       │                                  │
       │ ─── OBFF Signal (CPU_IDLE) ─────►│
       │                                  │
       │                        Device defers
       │                        non-urgent DMA
       │                                  │
       │ CPU waking up                    │
       │                                  │
       │ ─── OBFF Signal (CPU_ACTIVE) ───►│
       │                                  │
       │                        Device resumes
       │                        normal DMA

6. OBFF Signaling

OBFF Signaling Methods

Method Description Speed
Message OBFF Message TLP from RC In-band
WAKE# Signaling Sideband WAKE# pin encoding Fast (out-of-band)

OBFF States

State Meaning Device Action
Idle CPU in low-power state Defer non-urgent DMA
Active CPU active Normal operation
OBFF Optimized flush/fill window Good time for buffer operations

7. OBFF Capability

Device Capabilities 2

Bits Field Description
19:18 OBFF Supported 00=Not, 01=Message, 10=WAKE#, 11=Both

Device Control 2

Bits Field Description
14:13 OBFF Enable 00=Disabled, 01=Message, 10=WAKE#

8. System Integration

LTR + OBFF Together

    LTR tells platform: "I can wait X microseconds"
    OBFF tells device: "CPU is idle/active right now"
    
    Together they enable:
    
    1. Platform enters deep C-state (based on LTR)
    2. Device notified via OBFF (CPU_IDLE)
    3. Device buffers data instead of immediate DMA
    4. CPU wakes, OBFF signals CPU_ACTIVE
    5. Device performs batched DMA efficiently
    
    Result: Deeper power states + efficient I/O batching

Linux Power Management

9. Use Cases

NVMe with LTR

Network Card with OBFF

Power Impact

Proper LTR/OBFF configuration can reduce platform power by 10-30% during idle periods while maintaining acceptable latency.